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4 Way Power Splitter
This project demonstrates the design of a 4-Way Wilkinson microstrip power splitter. The divider uses 3 Wilkinson power splitters to go from one input to four outputs. This example demonstrates symmetrical layout concepts and uses the extraction flow to simulate the design with the AXIEM EM simulator.
This design was made to fit into a small area which results in significant coupling between different parts of the circuit. Such a tight layout usually requires EM simulation to properly account for the coupling. This design has been set up to easily edit the layout while maintaining the symmetry of the layout. It has also been set up to EM simulate part or the entire splitter.
Simulate this project to see the performance of the splitter. The graphs included in the project show the insertion loss, match and isolation of the circuit. The results when you first simulate are from the closed form models in this design.
All of the microstrip models in this design have been setup for extraction. This example will not cover the basics of how extraction works. Refer to the User's Guide or other extraction examples to understand these concepts.
Enable the EXTRACT block in the core schematic and simulate.
This will simulate all of the models in this schematic in the EM structure named EM_Extract_core and use the EM results for this schematic and any hierarchical reference to this schematic. You can toggle this block on and off to see the results with and without extracting this part of the design.
The previous step only EM simulated the core Wilkinson. However, from the layout it is obvious there is other coupling in this design. If you want to EM simulate the entire design, disable the EXTRACT block in the core schematic and enable the EXTRACT block in the 4way schematic.
This will simulate the entire design in an EM structure named EM_Extract_Top.
The layout system has ways of setting model parameters in one model to be the same as other models without using equations. This capability is very useful for this type of design where the layout is perfectly symmetric about the x-axis.
To see this, open the core schematic and layout. The upper path of the circuit uses a MTRACE2 model. Notice the L parameter is set to a number. The bottom path of the circuit is also using a MTRACE2 model, but some of its parameters are being inherited from the top path. The L parameter of this model is set to L@MTRACE.TL2. This syntax says, use the parameter L from the MTRACE2 model with the ID=TL2. The same setting has been applied to the RB and DB parameters of the lower MTRACE2 (these are secondary parameters). With all this set up, when the layout of the top MTRACE2 is edited, the bottom mirrors the same edits. Edit the shape of the top MTRACE2 by double clicking on it and dragging any of the edit handles. This is a closed structure so when you make edits, the loop may not close, but you can edit until the loop does close.
The same concepts that were applied to this one section of the core schematic are applied to the rest of the circuit to make editing the circuit in layout extremely efficient.