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Design Notes

High-Q Dielectric Resonator Oscillator

This example shows AWR’s capability to perform nonlinear oscillator simulations with high Q circuits.  This example is a Dielectric Resonator Oscillator (DRO), that uses a FET to provide negative resistance and a dielectric resonator (modeled as a parallel RLC).  This example shows several techniques to first look for the proper oscillation conditions.  Once these are found, then the circuit is simulated to find oscillation frequency, output power, and phase noise.  In this circuit, the Q of the resonator is varied to see how the phase noise of the circuit is affected.  

This project is showing the original HB simulator and the Aplac HB simulator.  

Overview

This design has been broken up into two core pieces of the circuit, the resonator, in the “DRO” schematic and the active device, in the “Negative_Resistance” schematic.  These blocks are then used as subcircuits for the schematics “Part1_Small_Signal_Oscillation_Condition”, and “Part2_Oscillator”.  

The resonator is modeled as a parallel RLC circuit in this project.  This model assumes that the user has simulated this resonator and has extracted these results or can get these values from a vendor’s datasheet.  Then in this example the value of L of the RLC is varied to change the overall performance of the resonator.  

The project is divided into two parts.  In the first part, the oscillation frequency is predicted using linear analysis techniques.  The second part of the project verifies the oscillation frequency and calculates a number of important oscillator characteristics: the power spectrum, waveform, and phase noise.

Part 1: Linear Oscillation Conditions

The linear conditions for oscillation are that the total admittance between the resonator and the active device (the negative resistance generator) should have a 0 imaginary part (the susceptance) and a negative real part (conductance).  This project shows two techniques of generating this data.  Both techniques are equivalent.  The results of this analysis are shown in the “Small Signal Oscillation Conditions” graph. 

The first technique is to measure the admittance looking into the resonator and negative resistance sections of the circuit.  This was the original reason for breaking the circuit into the two halves.  In the “Output Equations” block, the admittance for each is assigned to a variable.  These two values are then summed together to get the total admittance, given by the variable Yt.  The real and imaginary parts of the total admittance are plotted on the graph as “Total Conductance” and “Total Susceptance”. 

The second technique is shown in the “Part1_Small_Signal_Oscillation_Condition” schematic.  Both parts of the circuit are wired together; an additional port is placed between the resonator and negative resistance and the impedance is set to a high value so as not to load the circuit.   The total admittance can be measured directly on the graph.  The measurements are labeled as “Conductance at Port” and “Susceptance at Port”.  Notice the two techniques for predicting the oscillation frequency give very similar results.  The oscillation frequency is expected to be 8.5 GHz, which is where the susceptance is 0 and the conductance is negative.

To give a feel for the Q of the resonator, the S11 of the resonator is plotted on the “DRO S11” graph with the resonator inductance swept from 0.01 to 0.0001 nH.  Notice the smallest value of L gives the highest Q of the graph.  Q in this sense is determined relatively based on the width of the resonance in the circuit.   Note the capacitance of the resonator is scaled by the value of L so the resonance will always be the same frequency.   

Part 2: Nonlinear Oscillation Simulation

In the “Oscillator” schematic, the two halves of the circuit are wired together and an OSCAPROBE is connected between the two parts.  The OSCAPROBE is what determines the large signal characteristics of the oscillator.  There is a SWPVAR block to sweep the resonator inductance.  There is also an OSCNOISE block used to control the phase noise simulation of this circuit.  

The various graphs are as follows:

•    “Oscillation Frequency” - Tabular graph showing the fundamental oscillation frequency at the various values of inductance for the resonator.

•    “Phase Noise” - The single sideband phase noise versus the L of the resonator.

•    “Spectrum” - The spectrum of the oscillator, a direct result of the Harmonic Balance simulation.  

•    “Waveform” - The waveform of the oscillator resulting in the Inverse FFT from the Harmonic Balance simulation.  

Note that a simple nonlinear model was used in this example so the change in the phase noise curves is a direct result of the change in the resonator’s Q.  

 

Schematic - Negative_Resistance

Graph - Small Signal Oscillation Conditions

Graph - Phase Noise

Graph - Spectrum