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Digital Video Broadcasting Satellite Service (DVB-S) Transmit and Receive System
This example illustrates the use of VSS XML blocks to construct a DVB-S TX/RX system that investigates the impact of phase noise and DC cutoff on the bit error rate (BER) performance.
VSS DVB-S blocks can be found in the Elements tree under System Blocks/Libraries/DVBS Library." The DVB-S source (DVBS_SRC) contains standard-specific randomization, Reed-Solomon encoding, interleaving, and convolutional encoding. You can turn on or off the randomization circuit, and chose any of the five standard convolutional encoding rates as defined in the DVB-S specifications. The DVB-S receiver (DVBS_RX) automatically selects the appropriate convolutional coding rate needed for demodulation by taking advantage of VSS' propagated parameters. The DVB-S library is built in accordance with the ETSI EN 300 421 v.1.1.2 specification.
The DVB-S source uses a (204,188) shortened Reed-Solomon (RS) outer code and a 12 by 17 convolutional interleaver. The inner code is generated by a standard, rate1/2 convolutional encoder with polynomials 171 and 133 (octal), which is punctured to produce actual convolutional encoding rates of 1/2, 2/3, 3/4, 5/6 and 7/8.
The BER block controls the simulation by sweeping the variable EbNo from Pstart to Pstop in Pstep steps. These parameters are defined in the "Global Definitions" window. For each simulation point, the BER block will stop the simulation when either the number of errors collected reaches MINERR, or the number of trial reaches MXTRL; both MINERR and MXTRL are defined in this block.
The variable “AWGNpwr” is used for setting the noise level at the AWGN block. It is calculated based on the simulated Eb/No value (EbNo) and scaled appropriately to account for the modulation constellation size and overall coding rate. This is done automatically through equations in the "Global Definitions” window.
The "Global Definitions" window also allows the user to define the center frequency of the transmitted signal (fc) and the DC cutoff frequency ("DC_cutoff).
For comparison purposes, you can also run simulations with just the convolutional encoder and without the RS encoder. The appropriate equations are provided in the "Global Definitions" window. To do so you need to disable/bypass the RS encoder in DBVS_SRC and RS decoder in DVBS_RX.
A VSS TONE block with phase noise enabled is used to simulate phase noise on the LO.
A high pass filter with a user defined pass band frequency ("DC_cutoff") is used to simulate DC cutoff.
The DVBS_RX automatically sets an appropriate traceback length for the Viterbi decoder and also allows you to select Viterbi decoding with hard or soft decisions through the "DEC_TYPE" parameter. By right-clicking on the DVBS_RX block and choosing "Edit Subcircuit," you can view its internal implementation.
The "BER" graph shows VSS results in blue relative to an uncoded QPSK BER reference curve in red. If the other measurements in this project are enabled, the BER simulation may run slower.
The online help provides detailed information for each block in the subcircuits.