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Wilkinson EM Yield Example
This example shows a circuit that does yield analysis using parameters for both a closed form model as well as an electromagnetic simulation using AXIEM.
The situation for this example is that you have artwork for a Wilkinson combiner that you want to analyze for yield. The example already has the artwork imported as the EM structure named “Wilkinson_EM” as well as all the dielectric settings and ports configured for this structure. The goal of the analysis is to run yield with varying the substrate dielectric constant, the resistor value and the placement of the resistor between two arms of the Wilkinson.
The example is all set to run yield analysis. You can run yield analysis by selecting Simulate > Yield Analysis and then choose the appropriate analysis method. Yield Analysis will run as many random variations as you choose. Corners Analysis will run all combinations of yield variables at their extreme values. In this example, Corners Analysis will require 8 iterations to complete (requires 2^N where N is the number of varying parameters) and will complete in a reasonable amount of time for this example.
Note: This project has been setup to save the yield analysis data in a data set. After yield runs, you will see a YLD node under Data Sets. The next time you open the project, you can see the results of the yield analysis by right clicking on the data set and selecting Update Result without requiring any simulation.
Since this yield is a combination of both EM analysis and circuit simulation, the EM structure is used as a subcircuit in the “Wilkinson” schematic. A custom symbol was generated with the symbol wizard for this subcircuit. The chip resistor was added as a resistor model with an artwork cell assigned for the layout. Finally ports were added to complete the schematic. The three components of the yield setup are discussed below.
Chip Resistor Yield Setup
This is the simplest yield setup. For the properties of the resistor model in the schematic, a 10% Gaussian distribution was added.
EM Dielectric Constant Yield Setup
For the dielectric constant, first a variable is added in the STACKUP for the EM structure for the dielectric constant. To see this double click on the Enclosure node under the EM structure in the project browser. Then select the Material Defs tab and notice for the one dielectric layer defined the value for Er is using a variable name instead of a value. Then the variable is defined in the EM schematic. To see this, with the EM layout the active window, select the View EM Schematic tool bar to view this schematic. Notice the variable “Er” is defined in this view. Select the variable, right click and select Properties to see that this variable is setup to have 5% Gaussian distribution.
Chip Resistor Placement Yield Setup
The two lines leading to where the chip resistor will be attached have been parameterized using an edge length shape modifier. You can view these in the EM layout. Each has an equation for the L parameter for the modifier that is the nominal value (46) and then adjusted by a variable named “L_Delta”. The top adds this amount while the bottom subtracts this amount, leaving the gap constant. Then the variable is defined in the EM schematic. To see this, with the EM layout the active window, select the View EM Schematic tool bar to view this schematic. Notice the variable “L_Delta” is defined in this view. Select the variable, right click and select Properties to see that this variable is setup to have 5 mil uniform distribution.