Page tree
Skip to end of metadata
Go to start of metadata

Where To Find This Example

Select Help > Open Examples... from the menus and type either the example name listed above or one of the keywords below.

Or in Version 13 or higher you can open the project directly from this page using this button. Make sure to select the Enable Guided Help before clicking this button.

Design Notes


Negative-image modeling is a technique that can be used to generate source and load models for an amplifier.  These models are used to synthesize the amplifier's input and output matching circuits. The negative-image modeling technique greatly facilitates the  design of an amplifier where trade-offs between gain, noise, and bandwidth are not easy to make.

In any amplifier, the set of source and load impedances that provide a particular gain is not unique. This makes it difficult to design an amplifier successfully, especially when wide bandwidth is needed. Furthermore, it is rarely clear how well the amplifier's input can be matched for noise figure, especially when gain, bandwidth, and gain flatness constraints are applied. Negative-image modeling creates a criterion for determining these things.

The process is as follows and the schematics and graph are separated into the User Folders at the bottom of the Project browser:

Step 1. Design the circuit using negative reactive elements


Create simple source and load matching networks using negative-valued L and C elements. These networks can have any topology, but one that mirrors the device parasitics is best. For example, the gate of a FET is a series R-C network, so the input matching network should be a series C. The drain-to-source impedance appears like a parallel R-C, so use a negative capacitor in parallel with the device. More elements can be added if the desired performance is not achievable with these, but large numbers of elements make the synthesis of the real matching networks more difficult.


Make the input and output port load resistances variable (by either tuning or optimization).

Optimize the negative-valued matching elements and source/load port resistances. The goal can be whatever is important in the design: gain, noise, flatness, IP3, etc. This optimization will be much easier than optimizing a real network.

Step 2.  Realize the matching networks

Now convert the negative-valued matching networks, along with the loads, to positive values, and synthesize matching networks using these as loads. If you do this perfectly, the resulting real matching networks are precisely equivalent to the negative-value L-C matching networks.

Step 3. Put the entire circuit together


Connect the newly synthesized networks to the device. If you were able to match the networks well to the load models, you should obtain the same performance with the complete amplifier. In practice, the real networks will not achieve a perfect match, so the performance may not be precisely the same. However, it should be close.

In this project, the schematic "Step_1_Negative_Image_Model" is the optimized circuit using the negative-value L-C networks.  “Output_Network and “Step_2B_Output_Network Synthesis” are the real output network and the attempt to fit it to the load model; “Input_Network” and “Step_2A_Input_Network Synthesis” are the analogous networks for the input.

EM-based iCells are used for the tee and step junctions in the matching circuits. This should allow virtually exact design of the circuits.

The complete amplifier has a layout associated with the schematic. 

Schematic - Step_3_Complete_Amplifier

Schematic - Step_2B_Output_Network_Synthesis

Schematic - Step_2A_Input_Network_Synthesis

Schematic - Step_1_Negative_Image_Model