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This script compiles a verilogA file in Aplac library  and imports the library to the current project. License feature SPT_100 is needed to run this utility. Upon running the utility, the following dialog box displays asking you to choose a VerilogA Verilog-A file.

Compiling the file may take a while, from a few seconds to several minutes depending on the size of the verilogA verilog-A file. This dialog disappears after the compilation is done. User can cancel the compilation.

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