Dynamic Voiding, Smoothing, and Automatic Net Connectivity Extraction: New layout modes and tools that facilitate net management on large designs.
Robust Simplex Optimizers: Enhanced Simplex optimizers with variable step size.
Multi-Version Process Library (PDK) Support: Use multiple version of a PDK in the same project.
Job Scheduler Enhancements: Support for multiple remote queues and per EM document remote queues.
Parallel and Remote Circuit Simulation: Run long circuit simulation or optimization jobs in parallel, either locally or remotely.
Interoperability with Allegro and Virtuoso Platforms: Create and analyze RF/microwave IP in AWR Microwave Office and share schematic and layout with Virtuoso and Allegro platforms. This is a limited release feature.
Remote Linux EM Simulations: Run a remote Cadence® AWR® AXIEM® 3D planar EM or Cadence® AWR® Analyst™ 3D FEM EM software simulation on a Linux LSF cluster.
AWR AXIEM Data Set Size Reduction: Exclude de-embedding network data from data sets.
Analyst Simulator Improvements: Various solver improvements.
Clarity 3D Solver Integration: Integration of the Cadence® Clarity™ 3D Solver enables direct simulation of 3D EM structures from within the AWR Design Environment platform. This is a limited release feature.
Celsius Thermal Solver Integration: Run thermal analysis directly on structures created in the AWR Design Environment platform. This is a limited release feature.
New in VSS
Layout Trace Interconnect Modeling: Model linear interconnects in AWR VSS.
RF Amplifier Power Saturation Improvements: Improved modeling of RF amplifiers operating in saturation.
Frequency Multiplier Amplitude and Spur Level Improvements: Improved modeling of RF multipliers operating in saturation.
APSK Modulation: Support for generic and DVB-S2 and CCSDS communication standards.
New LDPC Encoding Schemes: Support for LDPC codes used in 5G NR (NSA and SA), DVB-S2, Wireless LAN, and other standards .