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Design Notes
Analog to Digital Converter
This example shows the operation of the VSS ideal ADC and DAC blocks. The ADC is configured to use 16 quanitzation levels, corresponding to a 4 bit A/D. Implementation showing an ADC and DAC and the new, ADC2 block are shown.
ADC is used to sample the real signal and convert it to digital. The DAC that follows is used to convert it back to real to use for evaluating the quantization effects. Various configurations can be used, such as "sample on tread" or "sample on rise," which are achieved by setting the GAIN, OFFSET and/or THRSLD parameters accordingly. Furthermore, the THRSLD parameter allows users to apply custom thresholds for achieving specific quantization schemes.
The new ADC2 block includes the functionality of the cascaded ADC and DAC blocks, with automatic scaling to produce the correct levels at its quantized signal output.
The waveform graphs show the input signal (a 1 GHz tone with 10 dBm power, resulting in a +1/-1 V into a 50 Ohm load), the digitized signal (16 levels) and the quantized version, scaled the same as the input.
Spectrum of the quantized output is also shown, which displayes the harmonic spurs caused by quantization.
For further information please read the on-line help for each block.